Patternable Low-κMaterials for “Greener” Semiconductor Manufacturing
Dr. Qinghuang Lin
IBM Thomas J. Watson Research Center
Yorktown Heights, New York
Semiconductor chips are the brain of the Information Age and the engine of the knowledge-based economy. Sophisticated modern chips power everything from spacecraft, super computers, communication networks, to iPhones and iPads. Historically, the semiconductor chip industry grew at a compound annual growth rate of more than 15%, and it has grown to become a gigantic business of more than US$300 billions per year in less than five decades.
The success of the semiconductor industry has been driven, in a large part, by the remarkable ability of optical lithography – the process to “print” intricate circuitries on silicon wafers -- to continuously shrink device features to improve performance and to reduce manufacturing costs. As the optical lithography and conventional device structures approach their limits, material innovations have become increasingly important to maintaining the historical performance improvement trends.
The introduction of new materials into semiconductor manufacturing, unfortunately, has led to an explosion in process complexity, dramatic increases in materials and energy consumptions and manufacturing costs as each new advanced chip-making factory requires $4 billion or more of investment. The increased complexity and costs threaten to slow down the historical pace of progress in the semiconductor industry.
In this talk, I will introduce a novel multifunctional material, called a patternable low dielectric constant (low-κ) dielectric material, which dramatically reduces process complexity and enables a simple, low-cost, and “greener” way to wire the miniscule transistors in advanced semiconductor chips. A patternable low-κ dielectric material combines the functions of a traditional photoresist and a dielectric material into one single material. It acts as a traditional photoresist during patterning and is subsequently converted into a low-κ dielectric material during a post-patterning curing process. It eliminates the need for all sacrificial materials and their related deposition, pattern transfer (etch) and removal processes required in the traditional manufacturing flow.
We have developed a patternable low-κmaterial that is compatible with the 248 nm optical lithography and possesses electrical and mechanical properties similar to those of an industry standard plasma enhanced chemical vapor deposition (PE CVD) deposited low-κmaterial. This κ=2.7 patternable low-κmaterial is based on a prevalent material platform and compatible with the current manufacturing infrastructure, thus easing a move toward mass adoption. We have also successfully demonstrated integration of this novel patternable low-κdielectric material into advanced chips with very high electrical yields. This “proof-of-concept” demonstration of the efficient, low-cost, “greener” patternable low-κmaterial technology is an important step toward preserving the historical pace of progress in the semiconductor industry.
Dr. Lin is a Research Staff Member and a manager at IBM Thomas J. Watson Research Center in Yorktown Heights, New York. He received his B.E. and M.S. degrees from Tsinghua University, Beijing, China and his Ph.D. degree from the University of Michigan—Ann Arbor under the tutelage of Professor Albert Yee.He was a post-doctoral fellow at the University of Texas at Austin