MAE Seminar: Data and Power Efficient Intelligence with Neuromorphic Hardware

Zoom Link Below
Emre Neftci, Ph.D.

Assistant Professor
Department of Cognitive Sciences and Department of Computer Science
UC Irvine

Zoom Link: https://uci.zoom.us/j/92728198500?pwd=UDNkR1VNN0YzazU0Vi9EV1VUZkpDdz09 

Abstract: The potential of machine learning and deep learning to advance artificial intelligence is driving a quest to build dedicated systems that accelerate such workloads at scale and in real-world settings. One natural approach is to take inspiration from the brain by building neuromorphic hardware that emulates the biological processes of the brain using digital or mixed-signal technologies. In this talk, I will first introduce neuromorphic processing and sensing technologies.

I'll discuss how some models of deep learning can be transferred to neuromorphic hardware, but that the hardware architectural constraints call for sparse, continual and local learning algorithms. State-of-the-art inference and learning algorithms optimized for such hardware stem from interdisciplinary methods anchored in machine learning theory and computational neurosciences. These algorithms can enable new applications to dynamic real-world problems where on-site adaptivity, latency or energy efficiency are essential. These results pave the way towards a computing technology that can be deployed with the same ease as edge deep learning accelerators, using machine learning software frameworks such as Tensorflow or PyTorch.

Bio: Emre Neftci received his M.Sc. degree in physics from EPFL and his Ph.D. in 2010 at the Institute of Neuroinformatics at the University of Zurich and ETH Zurich. Currently, he is an assistant professor in the Departments of Cognitive Sciences and Computer Science at the UC Irvine. His current research explores the bridges between neuroscience and machine learning, with a focus on the theoretical and computational modeling of learning algorithms that are best suited to neuromorphic hardware and non-von Neumann computing architectures.