EECS Seminar: Error Correction and Fault Tolerance in ReRAM-Based AI Accelerators

Abstract: ReRAM-based Compute-in-Memory (CiM) crossbar architectures offer an attractive design choice for accelerating AI inferencing in edge computing environments. However, faults in ReRAM cells due to manufacturing defects, noise and cell wearout over time degrade inferencing and training accuracy. In this presentation, the speaker will first present an analysis of ReRAM crossbar fault origins and their impact on CiM operation. Next, the speaker will describe a non-intrusive online testing and error recovery solution that monitors dynamic power consumption and correlates errors to the detection of changepoints in the monitored power-consumption time series. Following this, the speaker will describe selective error compensation, which leverages the insight that compensating for errors in a limited number of selected columns in a crossbar is sufficient to maintain accuracy. Together, these methods enable reliable inferencing in CiM AI accelerators, despite the occurrence of errors due to faults and non-idealities. 

Bio: Krishnendu Chakrabarty received the B. Tech. degree from the Indian Institute of Technology, Kharagpur, in 1990, and the M.S.E. and Ph.D. degrees from the University of Michigan, Ann Arbor, in 1992 and 1995, respectively. He is now the Fulton Professor of Microelectronics in the School of Electrical, Computer and Energy Engineering at Arizona State University (ASU) and Chief Technology Officer (CTO) of the Department of Defense Microelectronics Commons Southwest Advanced Prototyping (SWAP) Hub. He is also the director of the ASU Center on Semiconductor Microelectronics. Before joining ASU, he was the John Cocke Distinguished Professor and department chair of Electrical and Computer Engineering (ECE), and professor of computer science at Duke University.

Chakrabarty is a recipient of the National Science Foundation CAREER award, the Office of Naval Research Young Investigator award, the Humboldt Research Award from the Alexander von Humboldt Foundation, Germany, the IEEE Transactions on CAD Donald O. Pederson Best Paper Award (2015), the IEEE Transactions on VLSI Systems Prize Paper Award (2021), the ACM Transactions on Design Automation of Electronic Systems Best Paper Award (2017), multiple IBM Faculty Awards and HP Labs Open Innovation Research Awards, and over a dozen best paper awards at major conferences. He is also a recipient of the IEEE Computer Society Technical Achievement Award (2015), the IEEE Circuits and Systems Society Charles A. Desoer Technical Achievement Award (2017), the IEEE Circuits and Systems Society Vitold Belevitch Award (2021), the Semiconductor Research Corporation Technical Excellence Award (2018), the Semiconductor Research Corporation Aristotle Award (2022), the IEEE-HKN Asad M. Madni Outstanding Technical Achievement and Excellence Award (2021), and the IEEE Test Technology Technical Council Bob Madge Innovation Award (2018). He is a research ambassador of University of Bremen (Germany) and he was a Hans Fischer Senior Fellow at the Institute for Advanced Study, Technical University of Munich, Germany during 2016-2019. He is a 2018 recipient of the Japan Society for the Promotion of Science (JSPS) Invitational Fellowship in the “Short Term S: Nobel Prize Level” category. He is a recipient of the Distinguished Alumnus Award from the Indian Institute of Technology, Kharagpur.

Chakrabarty’s current research is in the areas of design-for-test of 3D integrated circuits and heterogeneous integration, AI accelerators, microfluidic biochips, hardware security and AI for healthcare. He is a fellow of ACM, IEEE, and AAAS, and a Golden Core Member of the IEEE Computer Society. He was a member of the DARPA Microsystems Exploratory Council during 2022-2023. Chakrabarty served as the editor-in-chief of IEEE Design & Test of Computers during 2010-2012, ACM Journal on Emerging Technologies in Computing Systems during 2010-2015, and IEEE Transactions on VLSI Systems during 2015-2018.