CPCC Seminar: Designing Extremely Efficient Computers with Memristors

Shahar Kvatinsky
Harut Barsamian Colloquia Room, EH 2430
Shahar Kvatinsky

Assistant Professor
Andrew and Erna Viterbi Faculty of Electrical Engineering,
Technion – Israel Institute of Technology

Abstract: For decades, the driving force for improvements in the computer industry has relied on scaling down the size of the transistors. Unfortunately, this trend has slowed down and computers cannot be improved anymore just by adding more devices. To overcome this challenge, numerous solutions are explored today, both on the technology domain (i.e., finding technologies to replace or complement CMOS transistors) and on the architecture domain. The classical computer architecture, based on general purpose processors and one coherent memory hierarchy, is insufficient anymore. In this talk, I will discuss how new technologies are the enablers of novel heterogeneous computer architectures. The talk will focus on resistive non-volatile memory technologies (memristors), and I will show how they can be much more than just a memory technology and how they can be used for different interesting applications such as artificial intelligence, internet-of-things, image processing and more.

Bio: Shahar Kvatinsky is an assistant professor at the Andrew and Erna Viterbi Faculty of Electrical Engineering, Technion - Israel Institute of Technology. He received the B.Sc. degree in computer engineering and applied physics and an MBA degree in 2009 and 2010, respectively, both from the Hebrew University of Jerusalem, and the Ph.D. degree in electrical engineering from the Technion - Israel Institute of Technology in 2014. From 2006 to 2009 he was with Intel as a circuit designer and was a post-doctoral research fellow at Stanford University from 2014 to 2015. Kvatinsky is an editor of Microelectronics Journal and has been the recipient of the 2015 IEEE Guillemin-Cauer Best Paper Award, 2015 Best Paper of Computer Architecture Letters, Viterbi Fellowship, Jacobs Fellowship, ERC starting grant, the 2017 Pazy Memorial Award, the 2014 and 2017 Hershel Rich Technion Innovation Awards, 2013 Sanford Kaplan Prize for Creative Management in High Tech, 2010 Benin prize, and six Technion excellence teaching awards. His current research is focused on circuits and architectures with emerging memory technologies and design of energy efficient architectures.

For more information about CPCC look at http://cpcc.uci.edu/