EECS Seminar: Applications of Machine Learning in Hardware Security
Yiorgos Makris, Ph.D.
University of Texas at Dallas
Abstract: Partly because of design outsourcing and migration of fabrication to low-cost areas around the globe, and partly because of increased reliance on third-party intellectual property, the integrated circuit (IC) supply chain is now considered far more vulnerable than ever before. With electronics ubiquitously deployed in sensitive domains and critical infrastructure, such as wireless communications, industrial sensors and actuators, as well as health, financial and military applications, understanding the corresponding risks and developing appropriate remedies have become paramount. To this end, in this presentation we will examine the role that machine learning can play in ensuring security and trustworthiness of ICs and the systems in which they are deployed. Specifically, we will first introduce methods for detecting and/or preventing malicious hardware modifications, a.k.a. hardware Trojans, and we will assess their effectiveness using silicon measurements from a custom-designed wireless cryptographic IC. Extensions of these concepts in the wireless networking domain will also be demonstrated using popular experimentation platforms. We will then review variants of these methods that can be used for distinguishing between genuine and counterfeit ICs, as well as for attesting the manufacturing facility where an IC was fabricated. Lastly, we will discuss solutions for hardware-based workload forensics and malware detection in microprocessors. We will conclude by examining the role that such machine learning-based methods can play in establishing security and trust in contemporary domains, such as autonomous vehicles and the internet of things.
Bio: Yiorgos is a professor of electrical and computer engineering at The University of Texas at Dallas, where he leads the Trusted and RELiable Architectures (TRELA) Research Laboratory. Prior to joining UT Dallas in 2011, he spent 10-1/2 years as a faculty member in the electrical engineering and computer science department at Yale University. He holds a Ph.D. (2001) and an M.S. (1997) in computer engineering from the University of California, San Diego, and a diploma of computer engineering and informatics (1995) from the University of Patras, Greece. His main research interests are in the application of machine learning and statistical analysis in the design of trusted and reliable integrated circuits and systems, with particular emphasis in the analog/RF domain. He also investigates hardware-based malware detection, forensics and reliability methods in modern microprocessors, as well as on-die learning and novel computational modalities using emerging technologies. His research activities have been supported by NSF, ARO, SRC, DARPA, Boeing, IBM, LSI, Intel, and TI. Yiorgos served as the 2016-17 general chair and the 2013-14 program chair of the IEEE VLSI Test Symposium, as well as the 2010-12 program chair of the Test Technology Educational Program (TTEP). He is as an associate editor of the IEEE Transactions on Information Forensics and Security, the IEEE Design & Test periodical and the Springer Journal of Electronic Testing: Theory and Applications, and he has also served as a guest editor for the IEEE Transactions on Computers and the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, and as a topic coordinator and/or program committee member for several IEEE and ACM conferences. He is a senior member of the IEEE, a recipient of the 2006 Sheffield Distinguished Teaching Award and a recipient of the Best Paper Award from the 2013 Design Automation and Test in Europe (DATE'13) conference and the 2015 VLSI Test Symposium (VTS'15).