EECS Seminar: Debug and Security in IoT Applications

Abstract: Silicon test and debug is a standard in modern microprocessors. It is even more needed in system-on-chips (SoC) environments to enable on-chip test and debug runs. Those SoC are for example cyber-physical-systems (CPS) and internet-of-things (IoT) devices, which will be available everywhere. The drawback of the possibility to debug such a system is the need of an access port, a backdoor into the system. This backdoor can be used by hackers to start unwanted activities. Security measures will be needed and already used to prevent those activities. But, as can be read in literature, the security can be broken. This leads to the need of early system simulations including debug and security, right from the beginning of the specification and design process. In this paper a SystemC approach is presented. To speed up the simulation, a "Parallel SystemC Simulation on Many-Core Architectures'' [doemer] could be used.

Bio: Andreas Siggelkow is a professor in the Electrical Engineering and Computer Science Department at the University of Applied Science Ravensburg-Weingarten, Germany. He is vice dean and head of four degree programs in electrical engineering. His research interests are test, debug and security in ASIC design. Currently, the co-simulation of hardware and software with respect to debug and security aspects in the early design phase. He has a diploma degree in electrical engineering from the University of Karlsruhe and a doctorate from the University of Stuttgart, at the Institute for Microelectronics. His research interest was hardware neural networks and fast multipliers. He worked for 12 years for Siemens Semiconductor, later Infineon Technologies, on base-band chips for mobile phones. The topics were debug and test of those system-on-chips with an increasing interest in security. Finaly, in 2007, he joined the University of Applied Science Ravensburg-Weingarten.