EECS Seminar: Advances in On-chip ESD Protection - from Co-design to Emerging Concepts

McDonnell Douglas Engineering Auditorium
Albert Wang, Department of Electrical and Computer Engineering, UC Riverside

Abstract: On-chip electrostatic discharge (ESD) protection design is an emerging challenge to integrated circuits (IC) as technologies continue to scale down and IC complexity continues to increase, particularly for high-frequency (GHz) and gigabit-per-second (Gbps) ICs. Unfortunately, as demand for robust on-chip ESD protection increases, the negative impact of ESD-induced parasitic effects on IC performance becomes inevitable and severe, which makes ESD protection design even more challenging today. This lecture will discuss recent advances in on-chip ESD protection designs for high-performance ICs including ESD fundamentals, advanced low-parasitic ESD protection designs for multi-GHz and multi-gigabit ICs, ESD co-design techniques and emerging ESD protection concepts for future ICs. Real-world ESD protection design examples will be provided.

Bio: Albert Wang received a bachelor's degree in electrical engineering from Tsinghua University, China, and a doctorate in electrical engineering from the State University of New York at Buffalo in 1985 and 1996, respectively. He was with the National Semiconductor Corp. from 1995 to 1998. From 1998 to 2007, he was a professor of electrical and computer engineering at the Illinois Institute of Technology. Since 2007, he has been a professor of electrical and computer engineering at UC Riverside, where he directs the Laboratory for Integrated Circuits and Systems. Wang is director for the UC systemwide Center for Ubiquitous Communications by Light (UC-Light). His research covers analog/mixed-signal/RF ICs,integrated design-for-reliability, 3-D heterogeneous integration of devices and ICs, IC CAD and modeling, and emerging devices and circuits. Wang received the CAREER Award from the National Science Foundation in 2002. He is the author of "On-Chip ESD Protection for Integrated Circuits" (Kluwer, 2002). He has published more than 230 peer-reviewed papers in the field and holds 11 U.S. patents. He has been associate editor for IEEE Transactions on Circuits and Systems I, editor for IEEE Electron Device Letters, associate editor for IEEE Transactions on Circuits and Systems II, guest editor-in-chief for the IEEE Transactions on Electron Devices and guest editor for IEEE Journal of Solid-State Circuits. He has served as IEEE Distinguished Lecturer for the Electron Devices Society, the Circuits and Systems Society and the Solid-State Circuits Society. He is jr. past president (2016-2017) and was president (2014-2015) for the IEEE Electron Devices Society. He also was chair for the IEEE CAS Analog Signal Processing Technical Committee (ASPTC) and committee member for the SIA International Technology Roadmap for Semiconductor (ITRS). He was TPC chair (2014-2015) and is general chair (2016) for IEEE RFIC Symposium. He has served as a committee member for many IEEE conferences, e.g., IEDM, BCTM, ASICON, IEDST, ICSICT, CICC, RFIC, APC-CAS, ASP-DAC, ISCAS, IPFA, ICEMAC, NewCAS, ISTC, IRPS, AP-RASC, MAPE, EDSSC, MIEL, etc. Wang is a Fellow of IEEE and AAAS.

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